| Model # : | CSE14G8 | CSE24G8 |
| # of Input Channels : |
1 |
2 |
| Vertical A/D Resolution : |
8-bit |
| Max. Rate per Channel : |
4 GS/s |
1-CH @ 4 GS/s 2-CH @ 2 GS/s |
| Bandwidth |
1.5 GHz |
| ANALOG INPUT CHANNELS |
| Connector |
SMA |
| Impedance |
50 Ω |
| Couplin |
DC or AC (software selectable |
| Analog bandwidth |
DC (50 Ω) = DC to 1.5 GHz |
A/D SAMPLING Rates per Channel, Model dependent (software selectable) |
4 GS/s, 2 GS/s, 1 GS/s, 500 MS/s, 250 MS/s, 125 MS/s, 50 MS/s, 25 MS/s, 10 MS/s, 5 MS/s, 2.5 MS/s, 1 MS/s, 500 kS/s, 250 kS/s, 100 kS/s, 50 kS/s, 25 kS/s, 10 kS/s, 5 kS/s |
| Voltage Ranges |
±50 mV, ±100 mV, ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V (software selectable) |
| Flatness : |
Within ±0.5 dB of ideal response to 800 MHz. DC Accuracy : ±1% on all input ranges DC User Offset : ±100 % on all input ranges, except ±5V that is ±20 % |
| ACQUISITION MEMORY |
Acquisition memory size is shared and equally divided among all active input channels (1 or 2). Standard Size : 2 GS (2 GB) Optional Sizes : 16 GS (16 GB) Architecture : Dual Port |
|
Data Streaming : Yes |
| Rate Accuracy : |
±1 part-per-million (0° to 50° C ambient) |
| Absolute Max.Input |
6 V RMS on all input ranges, except ±5V that is 8.5V RMS |
| LOW-PASS FILTER |
| Type |
3-pole 1 per Channel |
| Cut-Off Frequency |
200 MHz |
| Operation |
Individually Software Selectable |
| DYNAMIC PARAMETER PERFORMANCE |
ENOB : 7.6 Bits SNR : 47.2 dB THD : -59.3 dB SINAD : 47.0 dB SFDR : 56.5 dB |
| CLOCK SUb-SYSTEM |
| EXTERNAL REFERENCE CLOCK IN |
Connector : SMA Signal Level : Minimum 200 mV RMS, Maximum 500 mV RMS Impedance : 50 Ω |
| External Reference Clock Mode Rate |
10 MHz ±50 ppm; the external reference time base is used to synchronize the internal sampling clock. |
| EXTERNAL REFERENCE CLOCK OUT |
Connector : SMA Signal Level : ±300 mV Impedance : 50 Ω Output Modes : 10 MHz Reference Clock Frequency : 10 MHz |
| MULTIPLE RECORD |
| Pre-Trigger Data |
Up to almost full on-board memory |
| Record Length : |
64 points minimum. Can be defined with 64 point resolution |
| TRIGGERING |
| Trigerring |
Engines : 2 per Channel, 1 for External Trigger Source : Any Input Channel, External Trigger or Software Input Combination : All Combinations of Sources Logically OR’ed Slope : Positive or Negative (software selectable) Sensitivity : ±5% of Full Scale Input Range of Trigger Source. This implies that signal amplitude must be at least 5% of full scale to cause a trigger to occur. Smaller signals are rejected as noise. Accuracy : Internal: ±2% of Full Scale External: ±10% of Full Scale Post-Trigger Data : 64 points minimum. Can be defined with 64 point resolution. |
| External Trigger |
Connector : SMA Impedance : 2k Ω or 50 Ω Coupling : AC or DC Bandwidth : >300 MHz Voltage Range : ±1 V, ±5 V (software selectable) Amplitude : Absolute Maximum 6 V RMS |
| Trigger Out |
Connector : SMA Impedance : 50 Ω Amplitude : 0 – 1.5 V |
| TIME-STAMPING |
| Timing Resolution |
One Sample Clock Cycle |
| Counter Turnover |
>24 Hours Continuous |
| MULTI-CARD SYSTEMS |
| Master/Slave Mode |
Provides synchronized triggering and sampling on all channels for all cards to create larger multi-channel systems. |
| Independent Mode |
Each card operates independently within the system. |
| Number of Cards |
2 to 8 Cards for up to 16 Channels Total |
|
|
| GENERAL |
| DIMENSIONS |
Size : Single Slot, Full Height, Full Length |
| POWER CONSUMPTION |
34.8 Watts (typical) |
| PC SYSTEM REQUIREMENTS |
PCI Express (PCIe) Slot : 1 Free Full-Height Full-Length PCIe Gen1, Gen2 or Gen3, x8 or x16 Slot |
| Operating System |
Windows 10/8/7 (32-bit/64-bit), Linux – Requires SDK for C/C# |